Selection of given or co-authored talks and presentations

• J. Habich, C. Feichtinger, G. Wellein, waLBerla: MPI parallele Implementierung eines LBM Lösers auf dem Tsubame 2.0 GPU Cluster, Seminar Talk, Leibniz Rechenzentrum, München, Germany, Feb. 29th 2012.

• J. Habich, C. Feichtinger, G. Wellein, Hochskalierbarer Lattice Boltzmann Löser für GPGPU Cluster , High Performance Computing Workshop , Leogang, Austria, Feb. 27th 2012.


• G. Wellein, J.Habich, G. Hager, T. Zeiser, Node-level performance of the lattice Boltzmann method on recent multicore CPUs I,
  Parallel CFD Conference 2011, Barcelona, Spain, May 2011.


• G. Wellein, J.Habich, G. Hager, T. Zeiser, Node-level performance of the lattice Boltzmann method on recent multicore CPUs II,
  Parallel CFD Conference 2011, Barcelona, Spain, May 2011.


• J.Habich, C. Feichtinger, G. Wellein, GPGPU implementation of the LBM: Architectural Requirements and Performance Result,
  Parallel CFD Conference 2011, Barcelona, Spain, May 2011.


• C. Feichtinger, J. Habich, H. Köstler, U. Rüde G. Wellein, WaLBerla: Heterogeneous Simulation of Particulate Flows on GPU Clusters,
  Parallel CFD Conference 2011, Barcelona, Spain, May 2011.


• J.Habich, Ch. Feichtinger and G. Wellein, GPU optimizations at RRZE,
  invited Talk, ZISC GPU Workshop, Erlangen, Germany, April, 2011.


• G. Wellein, G. Hager and J.Habich, The Lattice Boltzmann Method: Basic Performance Characteristics and Performance Modeling,
  invited Minisymposia talk, SIAM CSE 2011, Reno, Nevada, USA, March, 2011.


• J.Habich and Ch. Feichtinger, Performance Optimizations for Heterogeneous and Hybrid 3D Lattice Boltzmann Simulations on Highly Parallel On-Chip Architectures,
  invited Minisymposia talk, SIAM CSE 2011, Reno, Nevada, USA, March, 2011.


• J.Habich, Ch. Feichtinger, T. Zeiser, G. Wellein, Optimizations on Highly Parallel On-Chip Architectures: GPUs vs. Multi-Core CPUs (for stencil codes),
  iRMB TU-Braunschweig, invited Seminar talk, Braunschweig, Germany, July 2010.


• J.Habich, Ch. Feichtinger, T. Zeiser, G. Wellein, Optimizations on Highly Parallel On-Chip Architectures: GPUs vs. Multi-Core CPUs (for stencil codes),
  iRMB TU-Braunschweig, invited Seminar talk, Braunschweig, Germany, July 2010.


• J.Habich, Ch. Feichtinger, T. Zeiser, G. Hager, G. Wellein, Performance Modeling and Optimization for 3D Lattice Boltzmann Simulations on Highly Parallel On-Chip Architectures: GPUs Vs. Multi-Core CPUs,
  ECCOMAS CFD Lisboa, Lisbon, Portugal, June 2010.


• J.Habich, T. Zeiser, G. Hager, G. Wellein, Performance Modeling and Multicore-aware Optimization for 3D Parallel Lattice Boltzmann Simulations,
  Facing the Multicore-Challenge, Heidelberger Akademie der Wissenschaften, Heidelberg, Germany, March 2010.


• J. Habich, T. Zeiser, G. Hager, G. Wellein: Performance Evaluation of Numerical Compute Kernels on GPUs,
  First International Workshop on Computational Engineering - Special Topic Fluid-Structure Interaction, Herrsching am Ammersee, Germany, October, 2009.


• J.Habich, T. Zeiser, G. Hager, G. Wellein: Towards multicore-aware wavefront parallelization of a lattice Boltzmann flow solver,
  5th Erlangen High-End-Computing Symposium, Erlangen, Germany, June 2009.


• J. Habich, T. Zeiser, G. Hager, G. Wellein: Enabling temporal blocking for a lattice Boltzmann flow solver through multicore-aware wavefront parallelization, submitted to Parallel CFD Conference,
  Moffett Field, California, USA, May 18-22, 2009.

J. Habich, T. Zeiser, G. Hager, G. Wellein: Speeding up a Lattice Boltzmann Kernel on nVIDIA GPUs, 

• First International Conference on Parallel, Distributed and Grid Computing for Engineering (PARENG09-S01), Pecs, Hungary, April 2009.


• J. Habich, G. Hager: Erfahrungsbericht Windows HPC in Erlangen,
  WindowsHPC User Group 2nd Meeting, Dresden, Germany, March 2009.


• J. Habich, G. Hager: Windows CCS im Produktionsbetrieb und erste Erfahrungen mit HPC Server 2008,
  WindowsHPC User Group 1st Meeting, Aachen, Germany, April 2008.


• T. Zeiser, J. Habich, G. Hager, G. Wellein: Vector computers in a world of commodity clusters, massively parallel systems and many-core many-threaded CPUs: recent experience based on advanced lattice Boltzmann flow solvers,
  HLRS Results and Review Workshop, Stuttgart, Germany, September 2008.


• S. Donath, T. Zeiser, G. Hager, J. Habich, G. Wellein: On cache-optimized implementations of the lattice Boltzmann method on complex geometries,
  ASIM, Erlangen, Germany, September 2005.